R&D Engineer

Synopsys
서울
4일 전

Category Engineering Hire Type Employee Job ID 12518 Date Posted 11/08/2025

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.


You Are:
You are a proactive and driven individual with a passion for innovation. With a BSEE/MSEE degree and 1-5 years of experience in Static Timing Analysis and gate-level circuit, you bring a wealth of knowledge and practical experience. You have a solid understanding of timing, statistical analysis, and front-end/back-end semiconductor manufacturing. Your proficiency with SPICE simulation tools like HSPICE, FineSim and PrimeSim sets you apart. You are familiar with industry-standard tools such as PrimeTime, PrimeShield, PrimeClosure(ECO), PrimePower, PrimeLib, and Library Compiler, and have working knowledge of programming languages C/C++ and scripting languages like Unix Shell, Perl, and TCL. Self-motivated with excellent time management skills, you can work independently on technical problem-solving and thrive in a collaborative team environment.
What You’ll Be Doing:
  • Developing and debugging PrimeShield, our Scalable, Fast, and Spice-Accurate gate level Timiing Analysis tool with multiple variations.
  • Collaborating with cross-functional teams to enhance tool capabilities.
  • Providing technical support and solutions to customers.
  • Contributing to the continuous improvement of our EDA software stack.
  • Staying updated with the latest industry trends and integrating relevant advancements into our tools.
The Impact You Will Have:
  • Enhancing the efficiency and accuracy of PrimeShield.
  • Enabling customers to achieve right-first-time silicon success.
  • Driving innovation in the semiconductor design industry.
  • Contributing to the development of high-performance chip designs.
  • Improving the reliability and performance of customer designs.
  • Advancing Synopsys' position as a leader in EDA software solutions.
What You’ll Need:
  • BSEE/MSEE degree with 1-5 years of experience in Static Timing Analysis and gate-level circuit.
  • Familiarity with computing algorithms and programming languages C/C++.
  • Good to have the experience with static timing analysis
  • Familar with industry-standard tools such as PrimeTime, PrimeShield, HSPSICE, PrimeClosure(ECO), PrimePower, PrimeLib, and Library Compiler.
  • Working knowledge of scripting languages like Unix Shell, Perl, and TCL.
Who You Are:
  • Self-motivated with excellent time management skills.
  • Ability to work independently on technical problem-solving.
  • Strong collaborative skills and a team player.
  • Proactive and driven individual with a passion for innovation.
  • Excellent communication skills.
  • Adaptable and open to learning new technologies and tools.
The Team You’ll Be A Part Of:

You will be part of the PrimeTime/PrimeShield R&D team, focused on developing Gate level Static Timing Analysis solutions. Our team is dedicated to solving high-value problems in the semiconductor design industry and enabling customers to bring high-performance chip designs to market rapidly. We collaborate closely with other teams to enhance tool capabilities and stay at the forefront of technological advancements.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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